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AMD’s upcoming Fiji GPU will feature new memory interface

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Over the past few months, there’s been an ongoing question over whether or not AMD’s upcoming Fiji GPU would use High Bandwidth Memory. Most reports have pointed towards yes, and that’s been our assumption, but official confirmation has been lacking. Now, for the first time, we’ve got unofficial-official confirmation, courtesy of Hot Chips 27.

Hot Chips is an annual tech symposium sponsored by IEEE and ACM. It tends to feature new and cutting-edge designs, with a mix of talks that focus on products that have already shipped as well as some that discuss upcoming hardware. This year, we’ve got talks scheduled on Xeon-D, Cherry Trail, a new MIPS V CPU, an open-source GPGPU project (MIAOW), AMD’s Carrizo, a new “lost-cost” processor from Oracle (Sonoma), and yes: “Fiji: The World’s First Graphics Processor with 2.5D High Bandwidth Memory.”

Now that it’s official, what can we expect?

One persistent rumor is that Fiji will launch with 4GB of main memory, a 4096-bit memory bus, and a maximum throughput of roughly 500GB/s. That’s substantially more bandwidth than the old R9 290X — a gain of as much as 60%. The bandwidth gains of HBM are well-known and we’ve discussed them at length: Figures as high as 1TB/s of memory bandwidth on second-generation HBM devices have been tossed around, without exaggeration.

LatencyTiming

Bandwidth, however, is just one characteristic of memory performance. Latency is equally important, but data on HBM latency compared with GDDR5 is much harder to come by. The implication, if I’ve read the various slide decks and data sheets correctly, is that HBM latency should be modestly better than GDDR5’s — but possibly not by much. Certainly it won’t improve by anything like the bandwidth jumps we’re going to see.

This makes historical sense. As the slide below illustrates, we’ve had a much easier time increasing memory density than decreasing latency.

Density-vs-Latency

This chart also explains why CPUs have long relied on sophisticated cache structures to improve performance.

HBM vastly increases system bandwidth and it should dramatically reduce power consumption. There will be latency improvements courtesy of moving to through silicon vias (TSVs), but the fundamental timings shouldn’t change much. GPU workloads, however, aren’t very latency sensitive — and throwing that much bandwidth at a GPU should yield its own sets of dividends.

Fiji is rumored to be dropping within a month or two, so we’ll see what AMD has cooked up with its next-generation memory architecture in the near future. The bandwidth improvements and dramatically reduced power consumption should both be good for any card.

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